3-6. Switching Characteristics
Turn-on
When the device is in the forward blocking mode, and if the positive gate bias (threshold voltage), which is enough to invert the surface of P base region under the gate, is applied, then an n-type channel forms and the current begins to flow.
At this time the anode-cathode voltage must be above 0.7V (potential barrier), so that it can forward bias the P+ substrate / N- drift junction (J1). The electron current flowing from the N+ emitter to the N- drift region through the channel is the base drive current of the vertical PNP transistor, and it induces a minority carrier (hole) injection from the P+ region to the N- base region. The current that flows to the emitter electrode are divided into the electron current (MOS current) flowing through the channel and bipolar current flowing through the P body / N- drift junction (J2). When gate bias falls to near the threshold voltage at on-state, the inversion layer conductivity is reduced, and significant voltage drop that arises from electron current flow occurs across the region as in a MOSFET.
When the voltage drop is equal to the difference between the gate bias and threshold voltage (VGE - Vth), then the channel is pinched off. At this point, the electron current becomes saturated.
Since this limits the base drive current of the PNP transistor, the hole current flowing through the PNP transistor is also limited. As a result, the device operates with saturated current at the active region (gate controlled output current).
Turn-off
The gate must be shorted to the emitter or a negative bias must be applied to the gate. When the gate voltage falls below the threshold voltage, the inversion layer cannot be maintained, and the supply of electrons into the N- drift region is blocked. At this point the turn-off process begins. As illustrated in Fig. 6, the collector current (ICO) falls to zero in two stages. As the electron current supplied through the MOSFET channel during the on-state is stopped, collector
current suffers an initial abrupt fall (ICD). After that, the tail current (ICT) comes from the minority carrier (hole) that was injected through the N- drift region from the P+ substrate during the on-state. The tail current of the IGBT lowers switching characteristics and increases switching loss. Since N- drift region is the base of the PNP transistor, it cannot be approached from outside, so it is not possible to control the tail current from outside. But it can be controlled with the amount of minority carrier (hole) injected through the N- drift region and recombination rate when it is off. In order to reduce the amount of injected minority carrier and increase the recombination rate when it is off, the concentration and the thickness of the N+ buffer layer between the P+ substrate and N- drift region must increase, as well as the dose of electron irradiation (in FSC, electron irradiation is applied to above 600V class except 400V) that takes place after device fabrication. However, improving the switching speed of the IGBT generally accompanies reduced current handling capability. As such, the trade-off between switching speed, which is related to switching loss, and forward voltage drop, which in turn is related to conduction loss, is important. The asymmetric structure is superior in such trade-offs as compared to a symmetric structure, and it can be improved by increasing the doping concentration in the buffer layer. In terms of power loss, the power MOSFET is better suited for
lower blocking voltage and high operating frequency applications, while the IGBT is better suited for higher blocking voltage and lower operating frequency.
High temperature characteristics
The minority carrier lifetime in the drift region increases as the temperature increases. This not only delays recombination process (tail current) of the minority carrier, but it also increases the NP transistor gain. So the portion of the initial abrupt fall (ICD) in the overall collector current reduces. As such, tf(fall time) of the spec is lengthened, and turn-off time increases with an increase in temperature, and the asymmetric structure has a lower rate of increase than the symmetric structure.
to be continued..............
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